1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device including a capacitor, and to a method of manufacturing the same.
2. Description of the Related Art
In general, in a semiconductor device, e.g., a DRAM (dynamic random access memory) including a capacitor, as the integration increases, a cell area decreases, and thus an area occupied by the capacitor is reduced. Thus, a method for increasing capacitance must be developed to manufacture a high-integrated semiconductor device.
So as to increase the cell capacitance, a capacitor dielectric layer employs a dielectric layer having a high dielectric constant, e.g., a tantalum oxide (Ta2O5) layer instead of a silicon nitride layer or a silicon oxide layer. A capacitor employing a tantalum oxide layer as the dielectric layer includes a first electrode and a second electrode formed of polysilicon on the dielectric layer. However, in a structure in which the Ta2O5 layer contacts with the polysilicon layer, silicon of the polysilicon layer reacts with oxygen of the tantalum oxide layer to form a silicon oxide layer on an interface. Thus, an overall equivalent thickness to SiO2, i.e., a thickness of an effective oxide layer increases, to thereby lower capacitance, and oxygen in the tantalum oxide layer is deficient, to thereby increase leakage current.
Therefore, there has been provided a method of forming the second electrode on the dielectric layer of a high dielectric constant using a metal single layer of WN or TiN.
However, when the second electrode is a single layer of WN, step coverage of the WN layer is poor, so that it is difficult to use the WN layer for a high-integrated semiconductor device. Also, when the second electrode is a single layer of TiN, a predetermined thin thickness, e.g., approximately 100 xc3x85 is required to reduce the leakage current density. When the TiN layer is approximately 100 xc3x85, a polysilicon layer must be further formed on the TiN layer to be used as an interconnection. In a case that the polysilicon layer is formed on the TiN layer, annealing after forming the polysilicon layer must be performed at 750xc2x0 C. or higher, e.g., 850xc2x0 C. Thus, the equivalent oxide thickness of the dielectric layer increases.
Further, the annealing temperature of 750xc2x0 C. or higher is not desired in the high-integrated semiconductor device.
To solve the above problems, it is an object of the present invention to provide a semiconductor device having a capacitor.
It is a further object of the present invention to provide a method of manufacturing the semiconductor device.
Accordingly, to achieve the object of the present invention, there is provided a semiconductor device having a capacitor. The capacitor includes a first electrode, a dielectric layer composed of a metal oxide layer including a Ta2O5 layer, and a second electrode composed of first and second metal nitride layers sequentially stacked. Each of the first and second metal nitride layers is a TiN layer and a WN layer.
To achieve the further object of the present invention, there is provided a method of manufacturing a semiconductor device including a capacitor. By the method, a first electrode of a capacitor is formed on a semiconductor substrate, and a dielectric layer having a metal oxide layer on the first electrode is formed. Then, a first and second metal nitride layers are sequentially formed on the dielectric layer, to thereby form a second electrode of a capacitor composed of the first and second metal nitride layers. Each of the first and second metal nitride layers is a TiN layer and a WN layer.
According to the present invention, the second electrode of the capacitor is a double-layered structure including first and second metal nitride layers so that annealing after forming the second electrode is performed at 750xc2x0 C. or less, to thereby reduce an equivalent oxide thickness of the dielectric layer.